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Asynchronous logic
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61	IGR Report GR/R16754/01 Behavioural Synthesis of Systems with Heterogeneous Timing (BESST) 1 Background/Context Add to Reading List Source URL: www.staff.ncl.ac.uk Language: English - Date: 2004-12-06 15:04:33 Electronic design automation Digital electronics Hardware description languages Electronic design Asynchronous circuit Logic synthesis Petri net Asynchronous system Verilog Electronic engineering Electrical engineering Electrical circuits
62	FINAL REPORT (GR/S81421/01) Add to Reading List Source URL: www.staff.ncl.ac.uk Language: English - Date: 2007-12-14 08:00:00 Digital electronics Integrated circuits Asynchronous circuit Logic synthesis Logic simulation Side channel attack High-level synthesis CPU design Integrated circuit design Electronic engineering Electronic design automation Electronic design
63	FINAL REPORT (GR/S12036) Synthesis and Testing of Low-Latency Asynchronous Circuits (STELLA) A.Yakovlev, A. Bystrov, A.M.Koelmans, G. Russell and D.J.Kinniment (School of Electrical, Electronic and Computer Engineering, Add to Reading List Source URL: www.staff.ncl.ac.uk Language: English - Date: 2006-06-07 13:42:56 Electrical circuits Electronic design Synchronization Asynchronous circuit Asynchronous system Digital electronics Logic synthesis CPU design VHDL Electronic engineering Electronic design automation Central processing unit
64	July 2000 Application Note: The "Flancter" by Rob Weinstein How To Set a Status Flag in One Clock Domain, Clear It in Another, and Never, Ever Have to Use an Asynchronous Clear for Anything but Reset Add to Reading List Source URL: www.floobydust.com Language: English - Date: 2007-12-03 20:11:21 Digital electronics Hardware description languages Computer memory Logic gates Flip-flop Verilog Multivibrator VHDL Field-programmable gate array Electronic engineering Electronics Electromagnetism
65	Application Note 74 Reading and Writing iButtons via Serial Interfaces www.dalsemi.com I. Add to Reading List Source URL: electronique.marcel.free.fr Language: English - Date: 2006-12-31 12:15:58 Electronics 1-Wire Universal asynchronous receiver/transmitter Microcontroller Serial port RS-232 Logic level ANT D54 Computing Digital electronics Electronic engineering
66	The ‘Asynchronous’ Bibliography B IB TEX database file async.bib Ad Peeters May 5, 2004 References Add to Reading List Source URL: www.win.tue.nl Language: English - Date: 2004-05-05 05:12:10 Electromagnetism Asynchronous system Asynchronous circuit Arbiter Sequential logic Delay insensitive circuit Robert Drost Kwabena Boahen Electrical circuits Electronic engineering Electrical engineering
67	One Billion Packet per Second Frame Processing Pipeline Mike Davies Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-28 00:21:45 Asynchronous circuit Clock signal Logic family IPv6 Futures and promises Dynamic logic Electrical engineering Electronic engineering Electrical circuits Computing
68	Synchronization in Asynchronously Communicating Digital Systems Priyadharshini Shanmugasundaram Add to Reading List Source URL: www.eng.auburn.edu Language: English - Date: 2010-05-02 22:04:06 Clock signal Digital electronics Electrical circuits Synchronization Asynchronous system Flip-flop Asynchronous circuit Delay insensitive circuit Sequential logic Electronic engineering Electronics Electromagnetism
69	Proceedings of the IEEE, Vol. 83, No. 1, pp[removed], January, [removed]Asynchronous Design Methodologies: An Overview Add to Reading List Source URL: www.ee.washington.edu Language: English - Date: 2000-02-07 20:17:32 Electromagnetism Flip-flop Asynchronous system Delay insensitive circuit Sequential logic Asynchronous circuit Hazard Synchronous circuit Clock signal Electronic engineering Digital electronics Electronics
70	In Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems (“Async2000”), April 2–6, 2000, Eilat, Israel. Add to Reading List Source URL: www.cs.unc.edu Language: English - Date: 2001-02-07 01:41:26 Electronics Dynamic random-access memory Pipeline Dynamic logic Eval Flip-flop Computer memory Computing Computer hardware

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